Notices tagged with riscv

I just booted uLinux on #TinyTapeout 6!

Very easy to use flashing tool by Uri made it easy to test Hirosh's SoC!

Also big thanks to @mike & @mole99 for the PMOD we're using with designs that need external memory.

#ASIC #opensource #RISCV

#Ubuntu 24.04 LTS Is Now Optimized for the Milk-V Mars RISC-V SBC https://9to5linux.com/ubuntu-24-04-lts-is-now-optimized-for-the-milk-v-mars-risc-v-sbc

#Linux #RISCV #OpenSource

Just gave my talk at #CPOSC ! 🐧🎉

Slides (PDF): https://princessleia.com/presentations/2024/Will_your_open_source_project_run_on_a_mainframe_Or_on_a_smartwatch_-_CPOSC_2024.pdf #IBMZ #ARM #RISCV #OpenPower #IBMPower

@nixCraft
I like both AMD & ARM
Waiting for usable #RiscV

Clair and I listening to @snowdusk tonight on #anonradio. The retroish computer I am using has a #star64 #riscv board inside.

A new BeagleV board launched today! The BeagleV Fire features RISC-V + FPGA. https://www.beagleboard.org/boards/beaglev-fire #beaglev #riscv #fpga

Calling all #RISCV developers! We want to showcase your boards, devices, and SW implementations in the Developer Zone at #RISCVSummit North America to highlight how RISC-V is everywhere. Submit a board at no cost here: https://form.jotform.com/232424623513044 #RISCVeverywhere

Original tweet: https://twitter.com/risc_v/status/1703886002865979515

We are thinking for RISC-V OLinuXino OSHW SBC and look at: D1 from Allwinner and RZ\Five from Renesas.

D1 +: low cost, HDMI
-: max 2GB DDR3, Linux rely on community
potential use: SBC to test RISCV architecture with keyboard, display, Ethernet

RZ\Five +: well documented, Linux LTS commitment from Renesas, 2x ETH1G, 2x CAN-FD, up to 4GB DDR4
RZ\Five -: no display, expensive
potential use: headless home server, FreedomBox, NextCloud, Home Assistant

Let me hear your comments!
#riscv #linux

A reminder that #RISCV is no savior of #FreeHardware, #OpenHardware or #LibreHardware.

The RISC-V Foundation is actively fighting any hopes it has of being such a thing.

https://lists.libre-soc.org/pipermail/libre-riscv-dev/2019-October/003035.html

The discussion about #RiscV and the #VisionFive 2 on the Purism Forum is really interesting.

There are people who would prefer #Openness over #Performance and #Convenience (I'm counting me in - otherwise I wouldn't use a #PinePhone and a #Librem5).

I feel like a VisionFive 2, with open source drivers, firmware and software would be good enough for me. (iliketurtles)

I immediately had to think about the MNT Reform and their research in Risc-V.

Maybe they would be willing to evaluate putting an existing SOC like the StarFive StarFive JH7110 onto a CPU board for the MNT Reform to offer an alternative to the pricy MNT RKX7 FPGA Module.

@mntmn@mastodon.social ?

So, my #FOSDEM talk is uploaded.
If you want to know about #bootstrapping #RISC-V and #Guix you might find it interesting.

https://fosdem.org/2023/schedule/event/guixriscv/