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1. minute (mntmn@mastodon.social)'s status on Saturday, 02-Mar-2024 06:45:21 JST minute

   solved another issue on RK3588 MNT Reform. this one was very satisfying. so far the SSD/M.2 slot didn't work, whenever i enabled the PCIe 3.0 controller the kernel would freeze. i had the theory that it needs a refclock on both ports even if i use only one so far. luckily this was an easy surgery on the mnt reform motherboard, as we have spare pcie clock outputs. and now it works, SSD is recognized :3

   • William D. Jones (cr1901@mastodon.social)'s status on Saturday, 02-Mar-2024 06:47:10 JST William D. Jones

     in reply to

     @mntmn I'm not doubting your skills, but I'm surprised a bodge wire fix works for PCIe speeds :o.

   • minute (mntmn@mastodon.social)'s status on Saturday, 02-Mar-2024 06:47:54 JST minute

     in reply to

     • William D. Jones

     @cr1901 refclk is only 100mhz and a diff clock so this should be quite tolerant

   • minute (mntmn@mastodon.social)'s status on Saturday, 02-Mar-2024 06:51:01 JST minute

     in reply to

     hard to believe but then there's only 1 issue left on the RK3588 module before we can offer at least a beta version... which is that ethernet links up only at 100mbit (link not recognized at 1000mbit). i suspect this has to do with 125mhz clock, but not sure. i don't see it declared in other DTSes, only for older 3586 stuff

   • minute (mntmn@mastodon.social)'s status on Saturday, 02-Mar-2024 06:51:39 JST minute

     in reply to

     i.e. there's no link but if i do `ethtool -s end0 speed 100` it comes online and it also gets 100mbit throughput...

   • minute (mntmn@mastodon.social)'s status on Saturday, 02-Mar-2024 06:53:16 JST minute

     in reply to

     here are the relevant schematic bits if someone wants to take a look while i take off for the weekend ^^

   • minute (mntmn@mastodon.social)'s status on Saturday, 02-Mar-2024 06:54:22 JST minute

     in reply to

     and relevant devicetree bits

   • minute (mntmn@mastodon.social)'s status on Saturday, 02-Mar-2024 07:53:59 JST minute

     in reply to

     • josch

     @josch yes, i can put another clock synth on the adapter board :3

   • josch (josch@floss.social)'s status on Saturday, 02-Mar-2024 07:54:00 JST josch

     in reply to

     @mntmn You call 100 MBit ethernet an issue but I don't even have any hardware at home that would be able to do more than that! :D
     I guess/hope the pcie refclock issues that you fixed via a mod on the motherboard can be solved on the adapter board without requiring a motherboard change?

   • minute (mntmn@mastodon.social)'s status on Saturday, 02-Mar-2024 21:15:16 JST minute

     in reply to

     • m_w

     @m_w good idea, thanks! will try on monday. and also scope the clocks

   • m_w (m_w@chaos.social)'s status on Saturday, 02-Mar-2024 21:15:17 JST m_w

     in reply to

     @mntmn

     Try adding a pull-up to pin 33 to enable the 125MHz output reference clock maybe.

   • minute (mntmn@mastodon.social)'s status on Tuesday, 05-Mar-2024 01:30:41 JST minute

     in reply to

     strangely, this was fixed today by just unplugging and replugging the ethernet cable at the device. iperf gets 940mbit/s.

   • minute (mntmn@mastodon.social)'s status on Tuesday, 05-Mar-2024 01:33:55 JST minute

     in reply to

     • Manawyrm | Sarah

     @manawyrm no. i use tx_delay = 0x47 now but i don't think i have the tools to calculate or measure this properly (ideas?). also, it works now by just replugging the rj45 once at the device (at 940mbit)

   • Manawyrm | Sarah (manawyrm@chaos.social)'s status on Tuesday, 05-Mar-2024 01:33:56 JST Manawyrm | Sarah

     in reply to

     @mntmn are those delays properly tuned?

   • minute (mntmn@mastodon.social)'s status on Tuesday, 05-Mar-2024 01:46:40 JST minute

     in reply to

     • Manawyrm | Sarah

     @manawyrm i see, thanks for sharing. this is one of the things why i complained about missing dtoverlay tooling in mainline... then this could be done without rebooting

   • Manawyrm | Sarah (manawyrm@chaos.social)'s status on Tuesday, 05-Mar-2024 01:46:41 JST Manawyrm | Sarah

     in reply to

     @mntmn then that's probably related. yeah, tuning those values "blindly" can be a bit of a tricky job.In the past, I've written a script to change the value, recompile the device-tree and reboot, then test UDP packet loss in a big loop (iperf3/udp). Ideally you do this on a direct link against another NIC which can receive packets with CRC errors.
     If you look at the test results of that across the values, it should look somewhat like a bell curve and then you'll get an idea of the best values.

   • minute (mntmn@mastodon.social)'s status on Tuesday, 05-Mar-2024 01:48:55 JST minute

     in reply to

     • Manawyrm | Sarah

     @manawyrm haha, nice idea. i also thought about something similar recently, that it would be nice to have an interpreter in the kernel for this kind of stuff

   • Manawyrm | Sarah (manawyrm@chaos.social)'s status on Tuesday, 05-Mar-2024 01:48:56 JST Manawyrm | Sarah

     in reply to

     @mntmn at work I have written a very violent kernel module we lovingly call "holzhammer.ko", which allows you to call functions in kernel space (like the ones to set those tuning parameters) directly, but I'm afraid I can't share that one 😆

   • minute (mntmn@mastodon.social)'s status on Tuesday, 05-Mar-2024 01:50:18 JST minute

     in reply to

     • Manawyrm | Sarah

     @manawyrm it's funny how all this driver development is done without decent tooling

   • Manawyrm | Sarah (manawyrm@chaos.social)'s status on Tuesday, 05-Mar-2024 01:50:19 JST Manawyrm | Sarah

     in reply to

     @mntmn just compiling, insmod, rmmod'ing kernel modules to do this in a loop would probably also work and be quicker than rebooting... but more work, ofc :)

   • minute (mntmn@mastodon.social)'s status on Wednesday, 06-Mar-2024 17:52:52 JST minute

     in reply to

     • m_w

     @m_w it turned out not to be an issue (the clock is there). strangely, i have to query the phy status once with mii-tool. then i can replug the ethernet cable and it works at gbit speed

   • m_w (m_w@chaos.social)'s status on Wednesday, 06-Mar-2024 17:52:53 JST m_w

     in reply to

     @mntmn any luck with the 125MHz clock?