now i'm knee deep in Ghidra listings. this code probably runs the entire hard drive, not just the host interface.
Notices by Tube🌞Time (tubetime@mastodon.social), page 13
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Tube🌞Time (tubetime@mastodon.social)'s status on Thursday, 28-Sep-2023 17:44:27 JST Tube🌞Time -
Tube🌞Time (tubetime@mastodon.social)'s status on Thursday, 28-Sep-2023 17:44:26 JST Tube🌞Time working through a nasty timing hazard with the mailbox flags on the command port. sometimes you write data and the "data available" flag never gets set.
so now i am digging through the logic that yosys generated to see if it even makes sense.
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Tube🌞Time (tubetime@mastodon.social)'s status on Thursday, 28-Sep-2023 17:44:26 JST Tube🌞Time managed to reverse engineer enough that I was able to read the defect map out of one of the original hard drives. sounds easy but the process uses DMA.
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Tube🌞Time (tubetime@mastodon.social)'s status on Thursday, 28-Sep-2023 17:44:26 JST Tube🌞Time drive firmware is turning into a bit of a slog so i switched over to the IBM BIOS. having a spec is nice, but the code will cover a bunch of corner cases.
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Tube🌞Time (tubetime@mastodon.social)'s status on Thursday, 28-Sep-2023 17:44:26 JST Tube🌞Time so last night I identified the power on self test routines by inspection. it's not too hard to identify a checksum routine or a memory test routine. this helped me fill in the memory map.
also, the POR test function stores the results at a particular memory location, and the codes match up with the POR error codes in the DBA-ESDI spec! the next step is to search the whole ROM for any instructions that read this memory location--this should identify the functions that generate the status block.
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Tube🌞Time (tubetime@mastodon.social)'s status on Thursday, 28-Sep-2023 17:44:25 JST Tube🌞Time another important step today--i got the data port and data port mailbox flags working. it can also detect 8-bit vs 16-bit transfers. getting very close to working PIO transfers.
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Tube🌞Time (tubetime@mastodon.social)'s status on Thursday, 28-Sep-2023 17:44:25 JST Tube🌞Time got that all sorted out. it was a synchronization issue with the flags between the two interfaces.
this is the "seek" command successfully completing! this is a *major* step since it requires 4 working mailboxes and interrupts.
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Tube🌞Time (tubetime@mastodon.social)'s status on Thursday, 28-Sep-2023 17:44:25 JST Tube🌞Time having good test programs is important. here's the status interface register dropping values. the Teensy program is just writing an incrementing number, and the diagnostics program is checking for gaps.
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Tube🌞Time (tubetime@mastodon.social)'s status on Thursday, 28-Sep-2023 17:44:24 JST Tube🌞Time ok this is fantastic--I've managed to transfer my first actual sector! it's just using PIO and the data is not from a real filesystem, but this is another big step forward!
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Tube🌞Time (tubetime@mastodon.social)'s status on Thursday, 28-Sep-2023 17:44:24 JST Tube🌞Time nice! I managed to get PIO data transfers working well enough for the buffer test routine to pass.
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Tube🌞Time (tubetime@mastodon.social)'s status on Monday, 25-Sep-2023 23:58:56 JST Tube🌞Time quite a few DOS programs had text-based GUIs. few were more advanced than Norton Desktop (and associated utilities). Check out the graphical mouse cursor which can smoothly span multiple characters!
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Tube🌞Time (tubetime@mastodon.social)'s status on Friday, 15-Sep-2023 21:38:32 JST Tube🌞Time there are 3 26-pin connectors. there are four synchros inside, a motor, a "digital analog converter", and two large potentiometers. there's also a gear train and an electronics module on top.
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Tube🌞Time (tubetime@mastodon.social)'s status on Friday, 15-Sep-2023 21:38:32 JST Tube🌞Time this is an aircraft avionics mystery! it's made by Bendix, but i have no part number because the cover is missing (bought it this way from our local electronics flea market). as this video shows, i got it to work, and this thread explains how...
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Tube🌞Time (tubetime@mastodon.social)'s status on Friday, 15-Sep-2023 21:38:31 JST Tube🌞Time on the other side of the unit you can see two more synchros as well as a "motor and rate generator" which is basically just a motor with an extra winding that generates a voltage proportional to the motor speed.
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Tube🌞Time (tubetime@mastodon.social)'s status on Friday, 15-Sep-2023 21:38:31 JST Tube🌞Time closeup of the Digital Analog Converter. based on the patent numbers, it appears to use a system of brushes to convert the shaft position to a set of parallel bits.
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Tube🌞Time (tubetime@mastodon.social)'s status on Friday, 15-Sep-2023 21:38:30 JST Tube🌞Time i spend a few hours puzzling over the electronics module and reverse engineered a schematic. this is step 1, which matches closely with the physical layout.
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Tube🌞Time (tubetime@mastodon.social)'s status on Friday, 15-Sep-2023 21:38:30 JST Tube🌞Time the electronics module is connected to the rest of the unit with a 15-pin D-sub connector, so it comes apart easily. on the other side, you can see a transformer on the far left, and next to it are two magnetic amplifiers!
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Tube🌞Time (tubetime@mastodon.social)'s status on Friday, 15-Sep-2023 21:38:30 JST Tube🌞Time the electronics module has a number of transistors, resistors, capacitors, and other components.
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Tube🌞Time (tubetime@mastodon.social)'s status on Friday, 15-Sep-2023 21:38:29 JST Tube🌞Time many of the components are identical between the two units, which is why i think mine is also made by Bendix.
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Tube🌞Time (tubetime@mastodon.social)'s status on Friday, 15-Sep-2023 21:38:29 JST Tube🌞Time i compared notes with @kenshirriff who has been reverse engineering a Bendix Air Data Computer: https://oldbytes.space/@kenshirriff/110578423219847109