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1. pistolero (p@fsebugoutzone.org)'s status on Thursday, 25-Apr-2024 17:22:57 JST pistolero

   in reply to

   • MisterRogersSnapped
   @MisterRogersSnapped It would have been funnier if I had gotten one of those RISC-V clusters, but I guess one weird architecture shift at a time.
   • † top dog :pedomustdie: likes this.
   • pistolero (p@fsebugoutzone.org)'s status on Thursday, 25-Apr-2024 17:23:00 JST pistolero

     in reply to

     • MisterRogersSnapped
     @MisterRogersSnapped It's good to be back. And on ARM chips this time!
   • MisterRogersSnapped (misterrogerssnapped@fsebugoutzone.org)'s status on Thursday, 25-Apr-2024 17:23:00 JST MisterRogersSnapped

     in reply to
     @p Oh shit that is nifty!
   • MisterRogersSnapped (misterrogerssnapped@fsebugoutzone.org)'s status on Thursday, 25-Apr-2024 17:23:01 JST MisterRogersSnapped
     @p Pistol Pete it is good to see you :)