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@FailurePersonified
> Oh sick (maybe I misread the other post),
Cheapest one they were selling when I ordered the uConsole back in October 2022, and it arrived a couple of months ago finally. I might not have picked it up had it not been both weird and cheap, because I have not been excited about the hardware in the past. One of my big objections, though, was that no one was making them and it remained to be seen if it'd work out, my suspicion was that it was a wank, overspecified pre-silicon that was driven by wishful thinking instead of the practical realities. Even if it worked, I expected Pentium f00f bugs and whatnot and I expected flakiness, weird shit, I expected X to crash randomly and the kernel to throw "illegal instruction" errors and the thing to hard-lock. I've been using the thing for a while and it's delightful, it's solid, the compiler doesn't get weird on me, no heatsink or fan and it never gets too hot to touch.
> since it's open, and there's no licensing involved.
> The possibilities with specialized instruction sets for different things (kind of like MMX or SSE) could get really whacky and fun.
Well, the RISC-V Foundation seems to be keeping a handle on extensions. I read an interview with one of the designers, interesting stuff, he wants to revive some of Cray's ideas and do vector instructions instead of multiple-dispatch and I'm kinda excited about that.
I mean, see attached for some grounding (hardware should be boring), but something cool might be happening. Cautiously optimistic.
> I'm thankful to hear that;
Oh, yeah, everything's easy to work with, etc. It's beautiful.
> I'm a little weary
:reeEEE:
> I remember getting into ARM when it was fairly new and getting no support for most shit for over like 2 years. (this was VERY early on)
Oh, yeah, it was a little rough. (I don't know how early "early" is. Acorn desktops in the 90s? iPAQ? GBA?) ARM is still a little rough. It's actually easier to work with RISC-V already. And part of that is, like, they pushed some stuff into the ISA that might be in the ABI otherwise, like which registers are caller-save versus callee-save, and that alone simplifies a lot.
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