@f4grx I was wanting something like this!
Will it be open source?
Notices by Marsh Ray (marshray@infosec.exchange)
-
Marsh Ray (marshray@infosec.exchange)'s status on Wednesday, 15-Jan-2025 00:41:34 JST Marsh Ray -
Marsh Ray (marshray@infosec.exchange)'s status on Wednesday, 15-Jan-2025 00:40:49 JST Marsh Ray @f4grx Maybe
- decoupling capacitors on VCC near
U1 and U2
any external supply connections- A place to add an R inline in Rx out
- Pads to connect the unused gates of U1 and U2 later if needed
- even a not-populated place for another (output-only?) SFI module